Intel announced today that it has made scaled Floating Body Cell (FBC) memory with its High-k and Metal Gate 45nm technology that could mean a new era of super dense cache cells in CPUs and other applications.
FBC memory will allow three to four times greater memory density than standard SRAM cache. FBC uses just one capacitor while SRAM uses six transistors further decreasing the needed size. The FBC is on a single 45nm Metal Gate on a thin 22nm, ultra low voltage Silicon On Insulator (SOI) substrate. The device is two generations ahead of the one Intel showcased in 2006.
FBC memory will allow three to four times greater memory density than standard SRAM cache. FBC uses just one capacitor while SRAM uses six transistors further decreasing the needed size. The FBC is on a single 45nm Metal Gate on a thin 22nm, ultra low voltage Silicon On Insulator (SOI) substrate. The device is two generations ahead of the one Intel showcased in 2006.
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